1. Field of the Invention
The present invention relates to a semiconductor wafer storage case used for transporting or storing a semiconductor wafer, and a method of storing a semiconductor wafer.
2. Description of the Related Art
In view of the growing demand for miniaturization of a semiconductor package, techniques are being developed for reducing the thickness of a semiconductor wafer. However, a semiconductor wafer with reduced thickness may easily break when it is transported or stored in the conventional manner. Thus, new techniques for safely storing a semiconductor wafer are currently in demand.
A storage case having slit portions arranged at predetermined intervals is normally used upon transporting or storing a semiconductor wafer. Such a storage case may be configured to store up to twenty-five (25) semiconductor wafers, for example. Another exemplary storage case may be configured to store plural semiconductor wafers that are stacked one on top of the other with interlayer sheets inserted therebetween. Other various storage cases have been proposed for transporting or storing plural semiconductor wafers, such as those described in Japanese Laid-Open Patent Publication No. 6-085046, Japanese Laid-Open Patent Publication No. 2000-355392, and Japanese Laid-Open Patent Publication No. 7-161805.
As is described above, techniques for reducing the thickness of a semiconductor wafer are being developed in response to the demand for a miniaturized semiconductor package. For example, a semiconductor wafer previously having a thickness of approximately 0.7 mm may now be reduced to have a thickness of approximately 0.05 mm.
A conventional semiconductor wafer storage case has grooves (or slit portions) arranged at its inner side at predetermined intervals. Semiconductor wafers are held within these grooves and stored in such a storage case. The storage case is normally configured to store unprocessed semiconductor wafers (e.g., semiconductor wafers having a thickness of approximately 0.7 mm), and accordingly, its inner side has grooves arranged at approximately 1-2 mm intervals.
It is noted that a conventional semiconductor wafer storage case does not have a structure for holding the peripheral edge portion of a semiconductor wafer in place. Although such a storage case may have versatility, when such a conventional semiconductor storage case is used for storing or transporting semiconductor wafers with reduced thickness, there may be a relatively high risk of the semiconductor wafers being damaged. Specifically, the semiconductor wafers may be prone to break due to vibrations and shock created during its transportation, for example.
FIGS. 1A-1C are diagrams showing an exemplary conventional extensible storage case. Specifically, FIG. 1A is a cross-sectional view of the extensible storage case when it is expanded. FIG. 1B is a cross-sectional view of the extensible storage case when it is compressed. FIG. 1C is a perspective view of the extensible storage case.
As is shown in FIG. 1C, the illustrated storage case 4 is arranged into a concertina structure having openings at its front face side and rear face side and a suitable stopper member (not shown) arranged at the rear face side opening. Plural slit portions 6 are arranged at predetermined intervals on the left side wall and the right side wall extending between the upper face 2 and lower face 3 of the storage case 4. A handgrip 5 for holding the storage case 4 is arranged on the upper face 2 of the storage case 4. Each of the slit portions 6 has an upper oblique face 6a and a lower oblique face 6b. 
In the following, storing or transporting a semiconductor wafer 1 with reduced thickness using the above-described extensible storage case 4 is described.
As is shown in FIG. 1A, the semiconductor wafer 1 that has been reduced in thickness by a back grinding process has a relatively sharp wafer edge. When this semiconductor wafer 1 is inserted into one of the slit portions 6, the wafer edge only comes into contact with the lower oblique face 6b of the slit portion 6.
When storing or transporting the semiconductor wafer 1, an external force is applied to the storage case 4 so that the storage case 4 may be compressed as is shown in FIG. 1B. In this case, the semiconductor wafer 1 may easily break when it is stored or transported.
Such a problem occurs due to the fact that an R-shaped portion of the periphery of the semiconductor wafer 1 is reduced to half of its original thickness. Specifically, in the process of reducing the thickness of the semiconductor wafer 1, the wafer edge of the semiconductor wafer 1 becomes sharp so that it may easily break even when a small external force is exerted thereon.
Also, the storage case 4 is relatively tall and has a relatively large volume so that the storage case 4 takes up space and may not be convenient cost-wise for being transported to a different location, for example. Accordingly, measures are desired for reducing the size of the storage case itself.
In view of the above-described problems, a stacking type storage case has been developed that stacks plural semiconductor wafers one on top of the other with interlayer sheets inserted between the stacked semiconductor wafers.
However, with such a configuration, the side face of the semiconductor wafer comes into contact with the inner wall of the storage case so that problems such as damage of the semiconductor wafer may not be adequately prevented when such a storage case is used for storing the semiconductor wafer 1 with reduced thickness.
Also, Japanese Laid-Open Patent Publication No. 7-161805 discloses a concertina type extensible case that is configured to protect the semiconductor wafer accommodated therein from damage during its transportation. However, the disclosed storage case cannot adequately protect a semiconductor wafer having a sharp wafer edge from breaking as is described in detail below with reference to FIG. 2.
In FIG. 2, the dotted line represents a pre-ground face (bottom face) 1d of the semiconductor wafer 1 before a back grinding process is performed thereon to reduce its thickness. It is noted that the distance from a patterned face 1a (upper face) to the pre-ground face 1d corresponds to the original thickness of the semiconductor wafer 1.
The back grinding process is performed on the semiconductor wafer 1 so that the pre-ground face 1d is ground to the solid line (ground face 1b) shown in FIG. 2. In this case, the thickness of the semiconductor wafer 1 corresponds to a distance between the patterned face 1a and the ground face 1b corresponding to the solid line shown in FIG. 2. By performing such a back grinding process, the thickness of the R-shaped portion of the periphery of the semiconductor wafer 1 is reduced to less than or equal to half its original thickness. Accordingly, the edge of the semiconductor wafer 1 is arranged into a sharp wafer edge 1c. 
As is described above with respect to FIG. 1A, when the semiconductor wafer 1 with reduced thickness is inserted into the slit portion 6 of the storage case 4, the edge of the semiconductor wafer 1 is supported only by the lower oblique face 6b. In this case, since the lower oblique face 6b of the slit portion 6 is slanted, the edge of the semiconductor wafer 1 comes into linear contact with the lower oblique face 6b so that the semiconductor wafer 1 may easily break or be damaged.
Further, when the storage case 4 is compressed in order to hold the semiconductor wafer 1 in place, the vertical direction pressing force applied to the storage case 4 may be focused on the edge of the semiconductor wafer 1 to thereby increase its risk of breaking.